Saw a blog post titled "How many registers does an x86-64 CPU have?" and my immediate thought was "it's impossible to know and a sin to ask".
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Saw a blog post titled "How many registers does an x86-64 CPU have?" and my immediate thought was "it's impossible to know and a sin to ask".
If you think the answer is 16, by the way, no it is not.
@ryanc oh, that’s easy, actually. The answer is precisely one less than whatever the ideal number for your workload would be.
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Saw a blog post titled "How many registers does an x86-64 CPU have?" and my immediate thought was "it's impossible to know and a sin to ask".
If you think the answer is 16, by the way, no it is not.
@ryanc (xkcd 2867)
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@ryanc
Long ago, I was starting to understand register renaming (the phrase "register file" gave me existencial doubts), and then they came with hyperthreading...
Now I feel CPU architecture is purely a spectator sport. -
Saw a blog post titled "How many registers does an x86-64 CPU have?" and my immediate thought was "it's impossible to know and a sin to ask".
If you think the answer is 16, by the way, no it is not.
@ryanc easier question:
How many registers does the Motorola 68000 have?
It is also not 16. -
A whole bunch of registers. If you run out of it, You might considder to stop using Macro Assembler and write GWBasic programs...
RAX, RBX, RCX, RDX, EAX, EBX, ECX, EDX, RDI, RSI, RBP, RSP, EDI, ESI, EBP, ESP, R8-R15, CS, DS, ES, FS, GS, SS, RIP, EIP, RFLAGS, EFLAGS, CR0-CR4, DR0-DR7, MSRs, SIMD, XMM0-XMM15, YMM0-YMM15, ZMM0-ZMM31, MM0--MM7,
ST0-ST7, MXCSR.@ryanc @bitchboss you forgot ah, al, ch, cl, dh, dl, bh, bl, dil, sil, spl and bpl. And of course r8l, r8w etc.
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@ryanc @bitchboss you forgot ah, al, ch, cl, dh, dl, bh, bl, dil, sil, spl and bpl. And of course r8l, r8w etc.
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Saw a blog post titled "How many registers does an x86-64 CPU have?" and my immediate thought was "it's impossible to know and a sin to ask".
If you think the answer is 16, by the way, no it is not.
@ryanc@infosec.exchange more than one
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Saw a blog post titled "How many registers does an x86-64 CPU have?" and my immediate thought was "it's impossible to know and a sin to ask".
If you think the answer is 16, by the way, no it is not.
@ryanc It depends a lot on what you mean by registers and which execution domain you're talking about.
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@gsuberland @ryanc we have microcode for amd too
and it works on the newest cpus unlike on intel. there are a lot of internal registes you can access only through microcode@nspace
Ooh, links?
@gsuberland @ryanc -
@ryanc It depends a lot on what you mean by registers and which execution domain you're talking about.
@dalias yes
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Saw a blog post titled "How many registers does an x86-64 CPU have?" and my immediate thought was "it's impossible to know and a sin to ask".
If you think the answer is 16, by the way, no it is not.
@ryanc Related: I grew up thinking the 6502 had three registers.
Then I saw someone say X and Y weren't registers at all.
Then I saw someone else say the first 256 bytes of RAM *were* registers.
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Saw a blog post titled "How many registers does an x86-64 CPU have?" and my immediate thought was "it's impossible to know and a sin to ask".
If you think the answer is 16, by the way, no it is not.
@ryanc
You *can* talk about "architectural registers" though. But even there, there are a bunch of special purpose registers, so what counts as a "register?" -
Saw a blog post titled "How many registers does an x86-64 CPU have?" and my immediate thought was "it's impossible to know and a sin to ask".
If you think the answer is 16, by the way, no it is not.
@ryanc having looked into that blog post: complicated. Very complicated. (To quote the Doctor)
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@bitchboss @dascandy @ryanc yup, you even get them for the extended GPRs in x64
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Saw a blog post titled "How many registers does an x86-64 CPU have?" and my immediate thought was "it's impossible to know and a sin to ask".
If you think the answer is 16, by the way, no it is not.
@ryanc please help me and support me
#freepalestine -
@ryanc Even for a Z80 it's not a trivial answer. (Yes I do know someone who wrote some code that used the R register.)
@TimWardCam @ryanc, let's see… from what I remember:
8-bit registers (treatable as 16-bit pairs): A, F, B, C, D, E, H, L.
16-bit registers (treatable as 8-bit halves): IX, IY.
8-bit registers: I, R.
16-bit registers: AF', BC', DE', HL', SP, PC.18 registers in total. I'm specifically not counting different views as distinct registers: AF is counted as A and F, but IXH and IXL are counted as IX.
Yes, some aspects of this are… somewhat arbitrary. I could count BC, DE and HL as three rather than six and it wouldn't be wrong. I could count AF that way too – and it probably does match the other pairs in terms of the actual hardware design (and it could reasonably be called FA as, looking at the opcode patterns, it makes sense for A to be the lower 8 bits).
Now. Have I missed anything…?
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@TimWardCam @ryanc, let's see… from what I remember:
8-bit registers (treatable as 16-bit pairs): A, F, B, C, D, E, H, L.
16-bit registers (treatable as 8-bit halves): IX, IY.
8-bit registers: I, R.
16-bit registers: AF', BC', DE', HL', SP, PC.18 registers in total. I'm specifically not counting different views as distinct registers: AF is counted as A and F, but IXH and IXL are counted as IX.
Yes, some aspects of this are… somewhat arbitrary. I could count BC, DE and HL as three rather than six and it wouldn't be wrong. I could count AF that way too – and it probably does match the other pairs in terms of the actual hardware design (and it could reasonably be called FA as, looking at the opcode patterns, it makes sense for A to be the lower 8 bits).
Now. Have I missed anything…?
@lp0_on_fire @ryanc Most people never come across R. I knew someone who bult a Rugby clock with no RAM, using just the registers as memory, and to find enough space they needed to use the top few bits of the R register (the bottom few bits cycled too fast to be useful).
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@bitchboss @dascandy @ryanc yup, you even get them for the extended GPRs in x64
@bitchboss @ryanc @gsuberland we even got low ones for di, si, bp and sp... which means you cannot mov ah, bpl...
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@nspace
Ooh, links?
@gsuberland @ryanc
