Some people claim thar the 6502 is a RISC processor.
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@simonzerafa @revk @etchedpixels @kbm0 @phloggen
You can add a "protected mode" by adding additional logic to any processor. It was done in 1982 or so by Motorola for the MC6809, by way of the MC6829 MMU chip, which of course also added memory mapping. The MC6829 could also be used by other microprocessors with a synchronous bus, including the 6502.
1/@brouhaha @simonzerafa @revk @kbm0 @phloggen The 6829 is not a protected mode in any real sense and the 6809 isn't capable of doing a protected mode because like the 6502 there are instructions that hard crash the processor.
The 6309 is capable with a lot of care of doing so but even then it's fairly hairy as you don't have a separate supervisor stack pointer. -
@simonzerafa @revk @etchedpixels @kbm0 @phloggen
You can add a "protected mode" by adding additional logic to any processor. It was done in 1982 or so by Motorola for the MC6809, by way of the MC6829 MMU chip, which of course also added memory mapping. The MC6829 could also be used by other microprocessors with a synchronous bus, including the 6502.
1/@simonzerafa @revk @etchedpixels @kbm0 @phloggen
Precedent for this sort of thing goes back to the IBM 709 computer, a vacuum tube machine introduced in 1957. MIT added a protected mode for use by their CTSS operating system (Compatible Time Sharing System), the first general-purpose computer time-sharing system, operational in 1961. -
@revk @simonzerafa @kbm0 @brouhaha @phloggen carry flag always gets me on 6502 when switching the CPU I am working with 6800 series, 8080 series and most others it's the other way around on subtract
@etchedpixels @revk @simonzerafa @kbm0 @phloggen
And just due to my having some more 6502 programming early on, I'm used to the carry/not borrow of the 6502, and get tripped up by other processors that have carry/borrow. -
@phloggen @brouhaha Hmm less than 18; Manchester Baby 1948 - 7 instructions; https://en.wikipedia.org/wiki/Manchester_Baby#Programming
@penguin42 @phloggen
That's the SSEM I.mentioned. -
@etchedpixels @revk @simonzerafa @kbm0 @phloggen
And just due to my having some more 6502 programming early on, I'm used to the carry/not borrow of the 6502, and get tripped up by other processors that have carry/borrow.@brouhaha @etchedpixels @revk @kbm0 @phloggen
Binary Coded Decimal (BCD) mode for arithmetic was always a fun activity on the 6502
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@larsbrinkhoff @phloggen
IIRC, that was a part of the original definition, but the industry has clearly moved past it. -
@larsbrinkhoff @phloggen
IIRC, that was a part of the original definition, but the industry has clearly moved past it.@brouhaha @larsbrinkhoff @phloggen I don’t think it was so much about a small number of instructions but that they should be so simple they are directly implemented not microcoded.
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@brouhaha @larsbrinkhoff @phloggen I don’t think it was so much about a small number of instructions but that they should be so simple they are directly implemented not microcoded.
@acsawdey @larsbrinkhoff @phloggen
But originally that was explained in terms of having few, simple instructions, and few, simple addressing modes.Now microprocessors called "RISC" may have hundreds of instructions, the instructions may be variable length, may have a bunch of memory addressing modes, and may take a variable number of cycles to complete. It wouldn't surprise me if some were partially microcode.
The "word" has perhaps not _completely_ ceased to have any meaning, but almost.
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@acsawdey @larsbrinkhoff @phloggen
But originally that was explained in terms of having few, simple instructions, and few, simple addressing modes.Now microprocessors called "RISC" may have hundreds of instructions, the instructions may be variable length, may have a bunch of memory addressing modes, and may take a variable number of cycles to complete. It wouldn't surprise me if some were partially microcode.
The "word" has perhaps not _completely_ ceased to have any meaning, but almost.
@brouhaha @acsawdey @larsbrinkhoff @phloggen
The RIDGE-32 for example, promoted as the first "commerical RISC" was microcoded.
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@brouhaha @acsawdey @larsbrinkhoff @phloggen
The RIDGE-32 for example, promoted as the first "commerical RISC" was microcoded.
@bitsavers @acsawdey @larsbrinkhoff @phloggen
You can still get a new RIDGE-32, and the price has dropped to only a kilobuck.
https://wildvalley.ca/products/athens-ridge-32-compound-bow -
@acsawdey @larsbrinkhoff @phloggen
But originally that was explained in terms of having few, simple instructions, and few, simple addressing modes.Now microprocessors called "RISC" may have hundreds of instructions, the instructions may be variable length, may have a bunch of memory addressing modes, and may take a variable number of cycles to complete. It wouldn't surprise me if some were partially microcode.
The "word" has perhaps not _completely_ ceased to have any meaning, but almost.
@brouhaha @larsbrinkhoff @phloggen you are certainly correct that it has ceased to have meaning.
Let’s just review the cdc-6600 architecture and go with “really invented by Seymour Cray” as the proper meaning.
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@brouhaha @larsbrinkhoff @phloggen I don’t think it was so much about a small number of instructions but that they should be so simple they are directly implemented not microcoded.
@acsawdey @brouhaha @larsbrinkhoff
Hence my argument about the Nova being the first RISC
