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CIRCLE WITH A DOT

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  3. Some people claim thar the 6502 is a RISC processor.

Some people claim thar the 6502 is a RISC processor.

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mos6502
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  • brouhaha@mastodon.socialB brouhaha@mastodon.social

    @simonzerafa @revk @etchedpixels @kbm0 @phloggen
    You can add a "protected mode" by adding additional logic to any processor. It was done in 1982 or so by Motorola for the MC6809, by way of the MC6829 MMU chip, which of course also added memory mapping. The MC6829 could also be used by other microprocessors with a synchronous bus, including the 6502.
    1/

    brouhaha@mastodon.socialB This user is from outside of this forum
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    brouhaha@mastodon.social
    wrote last edited by
    #42

    @simonzerafa @revk @etchedpixels @kbm0 @phloggen
    Precedent for this sort of thing goes back to the IBM 709 computer, a vacuum tube machine introduced in 1957. MIT added a protected mode for use by their CTSS operating system (Compatible Time Sharing System), the first general-purpose computer time-sharing system, operational in 1961.

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    • etchedpixels@mastodon.socialE etchedpixels@mastodon.social

      @revk @simonzerafa @kbm0 @brouhaha @phloggen carry flag always gets me on 6502 when switching the CPU I am working with 6800 series, 8080 series and most others it's the other way around on subtract

      brouhaha@mastodon.socialB This user is from outside of this forum
      brouhaha@mastodon.socialB This user is from outside of this forum
      brouhaha@mastodon.social
      wrote last edited by
      #43

      @etchedpixels @revk @simonzerafa @kbm0 @phloggen
      And just due to my having some more 6502 programming early on, I'm used to the carry/not borrow of the 6502, and get tripped up by other processors that have carry/borrow.

      simonzerafa@infosec.exchangeS 1 Reply Last reply
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      • penguin42@mastodon.org.ukP penguin42@mastodon.org.uk

        @phloggen @brouhaha Hmm less than 18; Manchester Baby 1948 - 7 instructions; https://en.wikipedia.org/wiki/Manchester_Baby#Programming

        brouhaha@mastodon.socialB This user is from outside of this forum
        brouhaha@mastodon.socialB This user is from outside of this forum
        brouhaha@mastodon.social
        wrote last edited by
        #44

        @penguin42 @phloggen
        That's the SSEM I.mentioned.

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        • brouhaha@mastodon.socialB brouhaha@mastodon.social

          @etchedpixels @revk @simonzerafa @kbm0 @phloggen
          And just due to my having some more 6502 programming early on, I'm used to the carry/not borrow of the 6502, and get tripped up by other processors that have carry/borrow.

          simonzerafa@infosec.exchangeS This user is from outside of this forum
          simonzerafa@infosec.exchangeS This user is from outside of this forum
          simonzerafa@infosec.exchange
          wrote last edited by
          #45

          @brouhaha @etchedpixels @revk @kbm0 @phloggen

          Binary Coded Decimal (BCD) mode for arithmetic was always a fun activity on the 6502 😌

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          • larsbrinkhoff@mastodon.sdf.orgL larsbrinkhoff@mastodon.sdf.org

            @phloggen @brouhaha First you must argue that RISC is about having a very small number of instructions.

            brouhaha@mastodon.socialB This user is from outside of this forum
            brouhaha@mastodon.socialB This user is from outside of this forum
            brouhaha@mastodon.social
            wrote last edited by
            #46

            @larsbrinkhoff @phloggen
            IIRC, that was a part of the original definition, but the industry has clearly moved past it.

            acsawdey@fosstodon.orgA 1 Reply Last reply
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            • brouhaha@mastodon.socialB brouhaha@mastodon.social

              @larsbrinkhoff @phloggen
              IIRC, that was a part of the original definition, but the industry has clearly moved past it.

              acsawdey@fosstodon.orgA This user is from outside of this forum
              acsawdey@fosstodon.orgA This user is from outside of this forum
              acsawdey@fosstodon.org
              wrote last edited by
              #47

              @brouhaha @larsbrinkhoff @phloggen I don’t think it was so much about a small number of instructions but that they should be so simple they are directly implemented not microcoded.

              brouhaha@mastodon.socialB phloggen@expressional.socialP 2 Replies Last reply
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              • acsawdey@fosstodon.orgA acsawdey@fosstodon.org

                @brouhaha @larsbrinkhoff @phloggen I don’t think it was so much about a small number of instructions but that they should be so simple they are directly implemented not microcoded.

                brouhaha@mastodon.socialB This user is from outside of this forum
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                brouhaha@mastodon.social
                wrote last edited by
                #48

                @acsawdey @larsbrinkhoff @phloggen
                But originally that was explained in terms of having few, simple instructions, and few, simple addressing modes.

                Now microprocessors called "RISC" may have hundreds of instructions, the instructions may be variable length, may have a bunch of memory addressing modes, and may take a variable number of cycles to complete. It wouldn't surprise me if some were partially microcode.

                The "word" has perhaps not _completely_ ceased to have any meaning, but almost.

                bitsavers@oldbytes.spaceB acsawdey@fosstodon.orgA 2 Replies Last reply
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                • brouhaha@mastodon.socialB brouhaha@mastodon.social

                  @acsawdey @larsbrinkhoff @phloggen
                  But originally that was explained in terms of having few, simple instructions, and few, simple addressing modes.

                  Now microprocessors called "RISC" may have hundreds of instructions, the instructions may be variable length, may have a bunch of memory addressing modes, and may take a variable number of cycles to complete. It wouldn't surprise me if some were partially microcode.

                  The "word" has perhaps not _completely_ ceased to have any meaning, but almost.

                  bitsavers@oldbytes.spaceB This user is from outside of this forum
                  bitsavers@oldbytes.spaceB This user is from outside of this forum
                  bitsavers@oldbytes.space
                  wrote last edited by
                  #49

                  @brouhaha @acsawdey @larsbrinkhoff @phloggen

                  The RIDGE-32 for example, promoted as the first "commerical RISC" was microcoded.

                  brouhaha@mastodon.socialB 1 Reply Last reply
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                  • bitsavers@oldbytes.spaceB bitsavers@oldbytes.space

                    @brouhaha @acsawdey @larsbrinkhoff @phloggen

                    The RIDGE-32 for example, promoted as the first "commerical RISC" was microcoded.

                    brouhaha@mastodon.socialB This user is from outside of this forum
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                    brouhaha@mastodon.social
                    wrote last edited by
                    #50

                    @bitsavers @acsawdey @larsbrinkhoff @phloggen
                    You can still get a new RIDGE-32, and the price has dropped to only a kilobuck.
                    https://wildvalley.ca/products/athens-ridge-32-compound-bow

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                    • brouhaha@mastodon.socialB brouhaha@mastodon.social

                      @acsawdey @larsbrinkhoff @phloggen
                      But originally that was explained in terms of having few, simple instructions, and few, simple addressing modes.

                      Now microprocessors called "RISC" may have hundreds of instructions, the instructions may be variable length, may have a bunch of memory addressing modes, and may take a variable number of cycles to complete. It wouldn't surprise me if some were partially microcode.

                      The "word" has perhaps not _completely_ ceased to have any meaning, but almost.

                      acsawdey@fosstodon.orgA This user is from outside of this forum
                      acsawdey@fosstodon.orgA This user is from outside of this forum
                      acsawdey@fosstodon.org
                      wrote last edited by
                      #51

                      @brouhaha @larsbrinkhoff @phloggen you are certainly correct that it has ceased to have meaning.

                      Let’s just review the cdc-6600 architecture and go with “really invented by Seymour Cray” as the proper meaning.

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                      • acsawdey@fosstodon.orgA acsawdey@fosstodon.org

                        @brouhaha @larsbrinkhoff @phloggen I don’t think it was so much about a small number of instructions but that they should be so simple they are directly implemented not microcoded.

                        phloggen@expressional.socialP This user is from outside of this forum
                        phloggen@expressional.socialP This user is from outside of this forum
                        phloggen@expressional.social
                        wrote last edited by
                        #52

                        @acsawdey @brouhaha @larsbrinkhoff

                        Hence my argument about the Nova being the first RISC

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