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nspace@infosec.exchangeN

nspace@infosec.exchange

@nspace@infosec.exchange
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  • Why do DRAM chips come in different column widths (x4, x8, x16)?
    nspace@infosec.exchangeN nspace@infosec.exchange

    @yuubi

    I think that makes sense, thanks!

    Uncategorized

  • Why do DRAM chips come in different column widths (x4, x8, x16)?
    nspace@infosec.exchangeN nspace@infosec.exchange

    @nytpu
    Hmm I don't think this is it, x4 chips have the same number of banks as x8 chips but twice as many rows for the same overall size. Why would anyone want that?

    I don't think that using x4 chips gives you more banks: When DRAM chips are wired together in, say, a DIMM, the width of the data bus is fixed to something like 64 bits. By using x4 chips the designer has to wire 16 x4 chips in parallel instead of 8 x8 chips. All these chips are connected to the same address and control lines, so the same set of rows is open in all the chips at any given time.

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  • Why do DRAM chips come in different column widths (x4, x8, x16)?
    nspace@infosec.exchangeN nspace@infosec.exchange

    Why do DRAM chips come in different column widths (x4, x8, x16)? Why didn't we decide that, say, all chips must be x8? What are the use cases for different bit widths?

    And why do we sometimes use x4 chips in PC/server DIMMs, when we have to array twice as many chips to reach a 64-bit word size compared to x8 chips? That seems counterintuitive, it means having twice as many chips on the DIMM and makes routing more complicated. 🤔

    Does anyone know?

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  • Saw a blog post titled "How many registers does an x86-64 CPU have?" and my immediate thought was "it's impossible to know and a sin to ask".
    nspace@infosec.exchangeN nspace@infosec.exchange

    @pixx @gsuberland @ryanc
    https://youtu.be/sUFDKTaCQEk
    https://bughunters.google.com/blog/zen-and-the-art-of-microcode-hacking

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  • Saw a blog post titled "How many registers does an x86-64 CPU have?" and my immediate thought was "it's impossible to know and a sin to ask".
    nspace@infosec.exchangeN nspace@infosec.exchange

    @gsuberland @ryanc we have microcode for amd too 😛 and it works on the newest cpus unlike on intel. there are a lot of internal registes you can access only through microcode

    Uncategorized
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