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  3. Years ago I had a "ReworkCTF" board with 20-odd PCB layout bugs designed into it on purpose, ranging from backwards LEDs to missing vias under a BGA to inner layer differential pair swaps.

Years ago I had a "ReworkCTF" board with 20-odd PCB layout bugs designed into it on purpose, ranging from backwards LEDs to missing vias under a BGA to inner layer differential pair swaps.

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  • azonenberg@ioc.exchangeA azonenberg@ioc.exchange

    Years ago I had a "ReworkCTF" board with 20-odd PCB layout bugs designed into it on purpose, ranging from backwards LEDs to missing vias under a BGA to inner layer differential pair swaps.

    The original board had some design issues that made some of the fixes easier/harder than intended, and also ancient, I think now EOL, parts (a Spartan-3A FPGA - even if not EOL nobody wants to use one of those in 2026).

    I'm hoping to do a gen 2 of the challenge soon probably based on a BGA STM32 or Spartan-7 but haven't worked out the specifics yet.

    Is anybody interested in contributing challenge concept based on real board bugs you've had?

    Also, would folks be interested in me livestreaming a "play through" of some/all of the challenges once I have a board in hand?

    tj@altelectron.org.ukT This user is from outside of this forum
    tj@altelectron.org.ukT This user is from outside of this forum
    tj@altelectron.org.uk
    wrote last edited by
    #7
    @azonenberg @jpm I have this from Congress two years ago. I think there’s demand.
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    azonenberg@ioc.exchangeA 1 Reply Last reply
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    • tj@altelectron.org.ukT tj@altelectron.org.uk
      @azonenberg @jpm I have this from Congress two years ago. I think there’s demand.
      Link Preview Image
      azonenberg@ioc.exchangeA This user is from outside of this forum
      azonenberg@ioc.exchangeA This user is from outside of this forum
      azonenberg@ioc.exchange
      wrote last edited by
      #8

      @tj @jpm yep i think that was... cpresser? who took my concept and ran with it to be a bit more newbie friendly and lower cost.

      tj@altelectron.org.ukT 1 Reply Last reply
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      • azonenberg@ioc.exchangeA azonenberg@ioc.exchange

        @tj @jpm yep i think that was... cpresser? who took my concept and ran with it to be a bit more newbie friendly and lower cost.

        tj@altelectron.org.ukT This user is from outside of this forum
        tj@altelectron.org.ukT This user is from outside of this forum
        tj@altelectron.org.uk
        wrote last edited by
        #9
        @azonenberg @jpm yeah looks to be, more boards for challenges with documented test stages would be great.

        The smd soldering kits from china are helpful for learning, but they don't have any mid steps. It either works or doesn't and that isn't the best for figuring out what you did wrong.
        cccpresser@chaos.socialC 1 Reply Last reply
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        • azonenberg@ioc.exchangeA azonenberg@ioc.exchange

          Years ago I had a "ReworkCTF" board with 20-odd PCB layout bugs designed into it on purpose, ranging from backwards LEDs to missing vias under a BGA to inner layer differential pair swaps.

          The original board had some design issues that made some of the fixes easier/harder than intended, and also ancient, I think now EOL, parts (a Spartan-3A FPGA - even if not EOL nobody wants to use one of those in 2026).

          I'm hoping to do a gen 2 of the challenge soon probably based on a BGA STM32 or Spartan-7 but haven't worked out the specifics yet.

          Is anybody interested in contributing challenge concept based on real board bugs you've had?

          Also, would folks be interested in me livestreaming a "play through" of some/all of the challenges once I have a board in hand?

          aburka@hachyderm.ioA This user is from outside of this forum
          aburka@hachyderm.ioA This user is from outside of this forum
          aburka@hachyderm.io
          wrote last edited by
          #10

          @azonenberg - IC footprint with the pins in reverse order on one side
          - depending on which pins in a (molex, etc) connector make contact first, an alternate path to ground exists through data lines that can't handle it

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          • tj@altelectron.org.ukT tj@altelectron.org.uk
            @azonenberg @jpm yeah looks to be, more boards for challenges with documented test stages would be great.

            The smd soldering kits from china are helpful for learning, but they don't have any mid steps. It either works or doesn't and that isn't the best for figuring out what you did wrong.
            cccpresser@chaos.socialC This user is from outside of this forum
            cccpresser@chaos.socialC This user is from outside of this forum
            cccpresser@chaos.social
            wrote last edited by
            #11

            @tj @jpm @azonenberg exactly. The main idea was to make a challenge board that is not super frustrating for beginners. And has lower requirements regarding tools and materials.
            https://gitlab.aachen.ccc.de/cpresser/reworkctf-pico/-/blob/main/docs/Challenges.md?ref_type=heads

            This was after I solved Andrews version and was not to happy with my own results 🙂

            I am considering to make more of them (they are "sold out"), but have not yet decided if I want to add more challenges or edit challenges.

            azonenberg@ioc.exchangeA 1 Reply Last reply
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            • cccpresser@chaos.socialC cccpresser@chaos.social

              @tj @jpm @azonenberg exactly. The main idea was to make a challenge board that is not super frustrating for beginners. And has lower requirements regarding tools and materials.
              https://gitlab.aachen.ccc.de/cpresser/reworkctf-pico/-/blob/main/docs/Challenges.md?ref_type=heads

              This was after I solved Andrews version and was not to happy with my own results 🙂

              I am considering to make more of them (they are "sold out"), but have not yet decided if I want to add more challenges or edit challenges.

              azonenberg@ioc.exchangeA This user is from outside of this forum
              azonenberg@ioc.exchangeA This user is from outside of this forum
              azonenberg@ioc.exchange
              wrote last edited by
              #12

              @cccpresser @tj @jpm well I'm planning to do a rev2 in the next month or so, then livestream a playthrough

              cccpresser@chaos.socialC 1 Reply Last reply
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              • azonenberg@ioc.exchangeA azonenberg@ioc.exchange

                Years ago I had a "ReworkCTF" board with 20-odd PCB layout bugs designed into it on purpose, ranging from backwards LEDs to missing vias under a BGA to inner layer differential pair swaps.

                The original board had some design issues that made some of the fixes easier/harder than intended, and also ancient, I think now EOL, parts (a Spartan-3A FPGA - even if not EOL nobody wants to use one of those in 2026).

                I'm hoping to do a gen 2 of the challenge soon probably based on a BGA STM32 or Spartan-7 but haven't worked out the specifics yet.

                Is anybody interested in contributing challenge concept based on real board bugs you've had?

                Also, would folks be interested in me livestreaming a "play through" of some/all of the challenges once I have a board in hand?

                craigjb@fosstodon.orgC This user is from outside of this forum
                craigjb@fosstodon.orgC This user is from outside of this forum
                craigjb@fosstodon.org
                wrote last edited by
                #13

                @azonenberg I thought I had more bodge pics, but here are a couple real ones

                1st pic is wrong crystal footprint would be good. On this board I swapped the two gnd pads with the out and vcc pads. On a non-symmetric footprint too.

                2nd pic is a bodged missing protection diode on a SOT transistor

                Link Preview ImageLink Preview Image
                craigjb@fosstodon.orgC 1 Reply Last reply
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                • craigjb@fosstodon.orgC craigjb@fosstodon.org

                  @azonenberg I thought I had more bodge pics, but here are a couple real ones

                  1st pic is wrong crystal footprint would be good. On this board I swapped the two gnd pads with the out and vcc pads. On a non-symmetric footprint too.

                  2nd pic is a bodged missing protection diode on a SOT transistor

                  Link Preview ImageLink Preview Image
                  craigjb@fosstodon.orgC This user is from outside of this forum
                  craigjb@fosstodon.orgC This user is from outside of this forum
                  craigjb@fosstodon.org
                  wrote last edited by
                  #14

                  @azonenberg students can use my crystal bodge as an example of low quality rework 🤣

                  0h00000000@ioc.exchange0 1 Reply Last reply
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                  • azonenberg@ioc.exchangeA azonenberg@ioc.exchange

                    @cccpresser @tj @jpm well I'm planning to do a rev2 in the next month or so, then livestream a playthrough

                    cccpresser@chaos.socialC This user is from outside of this forum
                    cccpresser@chaos.socialC This user is from outside of this forum
                    cccpresser@chaos.social
                    wrote last edited by
                    #15

                    @azonenberg @tj @jpm in that case, I will wait to see your rev2 and copy the new challenges and ideas that fit the "accessible" format as well.

                    My rough goal is to have a new version of my variant available for emfcamp.

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                    • craigjb@fosstodon.orgC craigjb@fosstodon.org

                      @azonenberg students can use my crystal bodge as an example of low quality rework 🤣

                      0h00000000@ioc.exchange0 This user is from outside of this forum
                      0h00000000@ioc.exchange0 This user is from outside of this forum
                      0h00000000@ioc.exchange
                      wrote last edited by
                      #16

                      @craigjb @azonenberg

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