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CIRCLE WITH A DOT

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  3. The red dot probably mean this is a QC reject, huh?

The red dot probably mean this is a QC reject, huh?

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  • craigjb@fosstodon.orgC craigjb@fosstodon.org

    The red dot probably mean this is a QC reject, huh?

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    craigjb@fosstodon.orgC This user is from outside of this forum
    craigjb@fosstodon.orgC This user is from outside of this forum
    craigjb@fosstodon.org
    wrote last edited by
    #2

    The lights come on at least! The FPGA gets warm quickly. I don’t see any obvious bitstream flash or boot mode switches…

    Is >25W idle normal for this beast?

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    0h00000000@ioc.exchange0 dlharmon@chaos.socialD 4 Replies Last reply
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    • craigjb@fosstodon.orgC craigjb@fosstodon.org

      The lights come on at least! The FPGA gets warm quickly. I don’t see any obvious bitstream flash or boot mode switches…

      Is >25W idle normal for this beast?

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      0h00000000@ioc.exchange0 This user is from outside of this forum
      0h00000000@ioc.exchange0 This user is from outside of this forum
      0h00000000@ioc.exchange
      wrote last edited by
      #3

      @craigjb Maybe pull the reset low and see if power changes? It might be stuck trying to access DDR that isn't there, or possibly bitstream comes from off-board?

      azonenberg@ioc.exchangeA 1 Reply Last reply
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      • craigjb@fosstodon.orgC craigjb@fosstodon.org

        The lights come on at least! The FPGA gets warm quickly. I don’t see any obvious bitstream flash or boot mode switches…

        Is >25W idle normal for this beast?

        Link Preview Image
        0h00000000@ioc.exchange0 This user is from outside of this forum
        0h00000000@ioc.exchange0 This user is from outside of this forum
        0h00000000@ioc.exchange
        wrote last edited by
        #4

        @craigjb Oh yeah, you probably need a heatsink/fan too, 25W is a lot of Pd.

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        • 0h00000000@ioc.exchange0 0h00000000@ioc.exchange

          @craigjb Maybe pull the reset low and see if power changes? It might be stuck trying to access DDR that isn't there, or possibly bitstream comes from off-board?

          azonenberg@ioc.exchangeA This user is from outside of this forum
          azonenberg@ioc.exchangeA This user is from outside of this forum
          azonenberg@ioc.exchange
          wrote last edited by
          #5

          @0h00000000 @craigjb may be jtag boot exclusively? with all the FMCs it looks like a dev board.

          And the static power of an FPGA that big will be huge even if no bitstream is loaded. You can see the mounting holes from where the heatsink used to be, presumably taken off to ID the part before listing on ebay

          0h00000000@ioc.exchange0 1 Reply Last reply
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          • azonenberg@ioc.exchangeA azonenberg@ioc.exchange

            @0h00000000 @craigjb may be jtag boot exclusively? with all the FMCs it looks like a dev board.

            And the static power of an FPGA that big will be huge even if no bitstream is loaded. You can see the mounting holes from where the heatsink used to be, presumably taken off to ID the part before listing on ebay

            0h00000000@ioc.exchange0 This user is from outside of this forum
            0h00000000@ioc.exchange0 This user is from outside of this forum
            0h00000000@ioc.exchange
            wrote last edited by
            #6

            @azonenberg Does Virtex protect itself if temp gets too high - i.e. w/o a heatsink on it?

            azonenberg@ioc.exchangeA 1 Reply Last reply
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            • 0h00000000@ioc.exchange0 0h00000000@ioc.exchange

              @azonenberg Does Virtex protect itself if temp gets too high - i.e. w/o a heatsink on it?

              azonenberg@ioc.exchangeA This user is from outside of this forum
              azonenberg@ioc.exchangeA This user is from outside of this forum
              azonenberg@ioc.exchange
              wrote last edited by
              #7

              @0h00000000 I believe most 7 series parts will shut down the active bitstream if they overheat, but if static power alone is enough to overheat they have no way to actually remove power.

              You should probably put *some* kind of thermal solution on it even if temporary.

              dlharmon@chaos.socialD 1 Reply Last reply
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              • craigjb@fosstodon.orgC craigjb@fosstodon.org

                The lights come on at least! The FPGA gets warm quickly. I don’t see any obvious bitstream flash or boot mode switches…

                Is >25W idle normal for this beast?

                Link Preview Image
                dlharmon@chaos.socialD This user is from outside of this forum
                dlharmon@chaos.socialD This user is from outside of this forum
                dlharmon@chaos.social
                wrote last edited by
                #8

                @craigjb That seems reasonable for the board. Those LTMs have significant input current at no load. Throw in a few clock generators and you are there.

                The VU13P itself shouldn't be 25 W, 9.6 A VCCINT at 85 C plus a bit more for other rails.

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                • azonenberg@ioc.exchangeA azonenberg@ioc.exchange

                  @0h00000000 I believe most 7 series parts will shut down the active bitstream if they overheat, but if static power alone is enough to overheat they have no way to actually remove power.

                  You should probably put *some* kind of thermal solution on it even if temporary.

                  dlharmon@chaos.socialD This user is from outside of this forum
                  dlharmon@chaos.socialD This user is from outside of this forum
                  dlharmon@chaos.social
                  wrote last edited by
                  #9

                  @azonenberg @0h00000000 On US+, automatic shutdown is off by default and would be at 125 C if enabled.

                  azonenberg@ioc.exchangeA 1 Reply Last reply
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                  • craigjb@fosstodon.orgC craigjb@fosstodon.org

                    The lights come on at least! The FPGA gets warm quickly. I don’t see any obvious bitstream flash or boot mode switches…

                    Is >25W idle normal for this beast?

                    Link Preview Image
                    0h00000000@ioc.exchange0 This user is from outside of this forum
                    0h00000000@ioc.exchange0 This user is from outside of this forum
                    0h00000000@ioc.exchange
                    wrote last edited by
                    #10

                    @craigjb I see a 14 pin .1" header at bottome right with LEDs labled FPGA_DONE and FPGA_INIT_B - that's gotta be the JTAG port.

                    craigjb@fosstodon.orgC 1 Reply Last reply
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                    • 0h00000000@ioc.exchange0 0h00000000@ioc.exchange

                      @craigjb I see a 14 pin .1" header at bottome right with LEDs labled FPGA_DONE and FPGA_INIT_B - that's gotta be the JTAG port.

                      craigjb@fosstodon.orgC This user is from outside of this forum
                      craigjb@fosstodon.orgC This user is from outside of this forum
                      craigjb@fosstodon.org
                      wrote last edited by
                      #11

                      @0h00000000 yup. I agree. The init and done LEDs are super dim, so looks like no bitstream loaded

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                      • dlharmon@chaos.socialD dlharmon@chaos.social

                        @azonenberg @0h00000000 On US+, automatic shutdown is off by default and would be at 125 C if enabled.

                        azonenberg@ioc.exchangeA This user is from outside of this forum
                        azonenberg@ioc.exchangeA This user is from outside of this forum
                        azonenberg@ioc.exchange
                        wrote last edited by
                        #12

                        @dlharmon @0h00000000 and that's only like gating clocks or a JPROGRAM or equivalent right? like it won't actually gate VCCINT or anything (I doubt there's any way for it to do so)

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