first impressions of the Lego smart brick, before I do any actual tearing down: wow, I forgot how good they are at working with plastic.
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@ldcd @whitequark
It is quite widespread, even if not visible to end users.
Being in most Intel CPU's and all that.@ftg @whitequark yeah that's why it's kind of funny, it is simultaneously a very common CPU and a very obscure CPU (ie it's hard to get comprehensive documentation, the devkit is literally an FPGA, etc)
Like they're not lying but they're trying to imply it's a normal CPU to use and be able to program which isn't really true
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connected half of the pads
this is my first time soldering a 0.3mm pitch WLCSP, so it took me a bit to set up the workspace the way that makes it possible, but it's not too bad

finally done. no shorts and (as far as i can tell under mag) no opens
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@ftg @whitequark yeah that's why it's kind of funny, it is simultaneously a very common CPU and a very obscure CPU (ie it's hard to get comprehensive documentation, the devkit is literally an FPGA, etc)
Like they're not lying but they're trying to imply it's a normal CPU to use and be able to program which isn't really true
@ldcd @ftg @whitequark I have yet to come across any SoC with an ARC core where the docs weren't partially or fully NDA'd, or at least gated behind a sales call.
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@ldcd @ftg @whitequark I have yet to come across any SoC with an ARC core where the docs weren't partially or fully NDA'd, or at least gated behind a sales call.
@gsuberland @ftg @whitequark exactly
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finally done. no shorts and (as far as i can tell under mag) no opens
@whitequark xtra smol 🤏

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@gsuberland @ftg @whitequark This is my industry standard very normal CPU core (no you cannot look at)
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@ldcd @ftg @whitequark I have yet to come across any SoC with an ARC core where the docs weren't partially or fully NDA'd, or at least gated behind a sales call.
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@Rairii @gsuberland @ftg @whitequark a lot of modern problems can probably be blamed on starfox
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@gsuberland @ftg @whitequark This is my industry standard very normal CPU core (no you cannot look at)
@ldcd @ftg @whitequark in fact most of the time it's not even a case of NDA, it's a completely custom SoC ASIC with ARC core IP inside and the only way to get docs is to work at the company. I'd say "or contract with them" but generally even then you won't get full docs for the ARC core IP without a first-party NDA with the IP vendor.
AIUI there's more use of COTS ARC SoCs around in the automotive space (primarily ECUs) but the detailed documentation and SDK/BSP tends to be NDA'd there too.
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@ldcd @ftg @whitequark in fact most of the time it's not even a case of NDA, it's a completely custom SoC ASIC with ARC core IP inside and the only way to get docs is to work at the company. I'd say "or contract with them" but generally even then you won't get full docs for the ARC core IP without a first-party NDA with the IP vendor.
AIUI there's more use of COTS ARC SoCs around in the automotive space (primarily ECUs) but the detailed documentation and SDK/BSP tends to be NDA'd there too.
@ldcd @ftg @whitequark definitely a weird architecture to run into in anything not hyper specialised. I'd be very surprised to stumble across it in an IoT device for example.
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@ldcd @ftg @whitequark definitely a weird architecture to run into in anything not hyper specialised. I'd be very surprised to stumble across it in an IoT device for example.
@gsuberland @ftg @whitequark It's also pretty common inside memory controllers afaict (the STM32MP2 and some RKs that use Synopsys DDR IP use it). I would be surprised if its not embedded in a lot of Synopsys IP
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@ldcd @ftg @whitequark definitely a weird architecture to run into in anything not hyper specialised. I'd be very surprised to stumble across it in an IoT device for example.
@gsuberland @ldcd @whitequark
So how do you rate it being in a Lego brick? -
@ldcd @ftg @whitequark in fact most of the time it's not even a case of NDA, it's a completely custom SoC ASIC with ARC core IP inside and the only way to get docs is to work at the company. I'd say "or contract with them" but generally even then you won't get full docs for the ARC core IP without a first-party NDA with the IP vendor.
AIUI there's more use of COTS ARC SoCs around in the automotive space (primarily ECUs) but the detailed documentation and SDK/BSP tends to be NDA'd there too.
@gsuberland @ldcd @ftg i found an ARC in a ThindPad once
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@gsuberland @ldcd @ftg i found an ARC in a ThindPad once
@gsuberland @ldcd @ftg in the keyboard controller no less!
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@gsuberland @ldcd @ftg in the keyboard controller no less!
@whitequark @gsuberland @ftg excuse me thats where 8051s are supposed to live; thats an invasive species
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@gsuberland @ldcd @whitequark
So how do you rate it being in a Lego brick?@ftg @ldcd @whitequark surprising but almost not surprising? it's weird but also one of those applications where I bet they had very specific requirements around hardware FPU/DSP capabilities, communications peripherals, power management, and physical size, where meeting them all at the same time required treading more unusual paths. the integrated DC-DC in that chip was probably a major selling point.
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@gsuberland @ftg @whitequark It's also pretty common inside memory controllers afaict (the STM32MP2 and some RKs that use Synopsys DDR IP use it). I would be surprised if its not embedded in a lot of Synopsys IP
@ldcd @ftg @whitequark Synopsys definitely uses ARC core IP a bunch.
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@ldcd @ftg @whitequark Synopsys definitely uses ARC core IP a bunch.
@gsuberland @ftg @whitequark its at least less unhinged than the hard microblazes that show up in a bunch of xilinx parts
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@gsuberland @ldcd @ftg in the keyboard controller no less!
@whitequark @ldcd @ftg hah, weird. that's an odd choice of architecture for a keyboard controller, unless it was doing audio or touchpad stuff too I suppose.
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@ldcd @ftg @whitequark I have yet to come across any SoC with an ARC core where the docs weren't partially or fully NDA'd, or at least gated behind a sales call.
@gsuberland @ldcd @ftg @whitequark stm32mp2 has an arc in the memory controller that you get a blob for, but you can dev for the rest of the chip (aside from the gpu and some corners of the pcie) with no ndas. So relatively open by that standard