Back to working on my tooling. Rebuilt the 32 channel all high detector to indicate all low as a distinct state from partially low. Gave the 24 channel logic probe an 8 channel expansion module. Expanding what started out as a slightly modified version of Ben Eater's single stepper and low frequency variable clock with a series of logic-selectable fixed frequency oscillators, most of which are probably very optimistic at this stage: 500 KHz, 1, 3, 5, 8, 16, 25, 33, and 60 MHz. Kinda hoping I can eventually get it to work all the way up at 80 MHz, but that's probably a long way off. Also, due to compounding gate delays, some parts of this thing are definitely going to be waiting several clock cycles for other parts to catch-up, above 16 MHz. Learning that a lot of my early design assumptions were very naive, and I'm sure I'm still near the beginning of learning how much I don't know.

]]>https://board.circlewithadot.net/topic/f2e6b392-0c2f-448e-b925-a03c40a50525/back-to-working-on-my-tooling.RSS for NodeThu, 09 Apr 2026 20:54:39 GMTMon, 30 Mar 2026 20:39:23 GMT60Kinda wishing I'd had at least one actual class on digital logic design, instead of gradually accumulating bits and pieces of knowledge, here and there, over decades. If I'd taken a class, though, I'd probably have known better than to attempt this project in the first place.

]]>https://board.circlewithadot.net/post/https://infosec.exchange/users/0x0ddc0ffee/statuses/116320070824762964https://board.circlewithadot.net/post/https://infosec.exchange/users/0x0ddc0ffee/statuses/116320070824762964Mon, 30 Mar 2026 20:43:44 GMT