<![CDATA[WHOLY CR*** thats scary]]>WHOLY CR*** thats scary!
I threw a BOOK of a description for this WireVis designer at claude, and this is what it came out with, I have not found any bugs yet. credits to @willreil for "chudcore"
I will play a bit more and post this.

Link Preview Image
]]>https://board.circlewithadot.net/topic/f07ea923-d4f5-4092-8a7a-4d5f79d514e9/wholy-cr-thats-scaryRSS for NodeFri, 15 May 2026 08:24:55 GMTSat, 18 Apr 2026 08:45:11 GMT60<![CDATA[Reply to WHOLY CR*** thats scary on Sat, 18 Apr 2026 17:58:36 GMT]]>

Link Preview Image
GitHub - ruenahcmohr/wireVis-Pin-mapper: allow for label overlay on pcb images that also generates connector section for wireVis.

allow for label overlay on pcb images that also generates connector section for wireVis. - ruenahcmohr/wireVis-Pin-mapper

favicon

GitHub (github.com)

There is a github repo for it.
Fork it all you like!

]]>https://board.circlewithadot.net/post/https://infosec.exchange/users/RueNahcMohr/statuses/116427005403500420https://board.circlewithadot.net/post/https://infosec.exchange/users/RueNahcMohr/statuses/116427005403500420Sat, 18 Apr 2026 17:58:36 GMT<![CDATA[Reply to WHOLY CR*** thats scary on Sat, 18 Apr 2026 08:52:23 GMT]]>damn, that didn't even eat all tonights tokens...

]]>https://board.circlewithadot.net/post/https://infosec.exchange/users/RueNahcMohr/statuses/116424857588198315https://board.circlewithadot.net/post/https://infosec.exchange/users/RueNahcMohr/statuses/116424857588198315Sat, 18 Apr 2026 08:52:23 GMT