<![CDATA[I probably should have noticed, by now, that the EEPROMs I was planning to use in the instruction decoder have a read access time of 150 ns.]]>

<![CDATA[I probably should have noticed, by now, that the EEPROMs I was planning to use in the instruction decoder have a read access time of 150 ns.]]>I probably should have noticed, by now, that the EEPROMs I was planning to use in the instruction decoder have a read access time of 150 ns. At the original target clock rate, that's more than 10 cycles, just to access the lookup table. And to think, I was worried about 2-3 cycles of delay from a multiplexor.

]]>https://board.circlewithadot.net/topic/ee9197df-7cd8-44f2-a688-5170430eeae0/i-probably-should-have-noticed-by-now-that-the-eeproms-i-was-planning-to-use-in-the-instruction-decoder-have-a-read-access-time-of-150-ns.RSS for NodeThu, 09 Apr 2026 20:48:46 GMTFri, 03 Apr 2026 09:59:35 GMT60