<?xml version="1.0" encoding="UTF-8"?><rss xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:atom="http://www.w3.org/2005/Atom" version="2.0"><channel><title><![CDATA[Quick design to throw into the next PCB order]]></title><description><![CDATA[<p>Quick design to throw into the next PCB order</p><p><a href="https://infosec.exchange/tags/pcb" rel="tag">#<span>pcb</span></a> <a href="https://infosec.exchange/tags/prototyping" rel="tag">#<span>prototyping</span></a></p>

<div class="row mt-3"><div class="col-12 mt-3"><img class="img-thumbnail" src="https://media.infosec.exchange/infosec.exchange/media_attachments/files/116/267/313/682/492/540/original/51657e52e9cac1f2.png" alt="Link Preview Image" /></div></div>]]></description><link>https://board.circlewithadot.net/topic/cb05569d-110c-4077-bdc3-5d8046c374a7/quick-design-to-throw-into-the-next-pcb-order</link><generator>RSS for Node</generator><lastBuildDate>Fri, 10 Apr 2026 16:05:27 GMT</lastBuildDate><atom:link href="https://board.circlewithadot.net/topic/cb05569d-110c-4077-bdc3-5d8046c374a7.rss" rel="self" type="application/rss+xml"/><pubDate>Sat, 21 Mar 2026 13:08:25 GMT</pubDate><ttl>60</ttl><item><title><![CDATA[Reply to Quick design to throw into the next PCB order on Sat, 21 Mar 2026 19:36:28 GMT]]></title><description><![CDATA[<p><span><a href="/user/phos%40infosec.exchange">@<span>phos</span></a></span> thanks a lot! <img class="not-responsive emoji" src="https://media.infosec.exchange/infosec.exchange/custom_emojis/images/000/170/709/original/38acdcc335ea9ebe.gif" title=":ablobcatnod:" /></p>]]></description><link>https://board.circlewithadot.net/post/https://infosec.exchange/users/CryptoLek/statuses/116268845512696591</link><guid isPermaLink="true">https://board.circlewithadot.net/post/https://infosec.exchange/users/CryptoLek/statuses/116268845512696591</guid><dc:creator><![CDATA[cryptolek@infosec.exchange]]></dc:creator><pubDate>Sat, 21 Mar 2026 19:36:28 GMT</pubDate></item><item><title><![CDATA[Reply to Quick design to throw into the next PCB order on Sat, 21 Mar 2026 13:30:38 GMT]]></title><description><![CDATA[<p><span><a href="/user/phos%40infosec.exchange">@<span>phos</span></a></span> oh connectable vias are a nice idea. I hadn't thought of that.</p>]]></description><link>https://board.circlewithadot.net/post/https://chaos.social/users/gsuberland/statuses/116267407035370239</link><guid isPermaLink="true">https://board.circlewithadot.net/post/https://chaos.social/users/gsuberland/statuses/116267407035370239</guid><dc:creator><![CDATA[gsuberland@chaos.social]]></dc:creator><pubDate>Sat, 21 Mar 2026 13:30:38 GMT</pubDate></item><item><title><![CDATA[Reply to Quick design to throw into the next PCB order on Sat, 21 Mar 2026 13:26:12 GMT]]></title><description><![CDATA[<p><span><a href="/user/gsuberland%40chaos.social">@<span>gsuberland</span></a></span> this is just the outer layers, no internal grounds.</p><p>I was considering it, potentially having a ground and power plane via on every row that can be bridged in, but I wanted to rush this design out as we are about to place the next order.</p><p>Potential side project for the future</p>]]></description><link>https://board.circlewithadot.net/post/https://infosec.exchange/users/phos/statuses/116267389607671323</link><guid isPermaLink="true">https://board.circlewithadot.net/post/https://infosec.exchange/users/phos/statuses/116267389607671323</guid><dc:creator><![CDATA[phos@infosec.exchange]]></dc:creator><pubDate>Sat, 21 Mar 2026 13:26:12 GMT</pubDate></item><item><title><![CDATA[Reply to Quick design to throw into the next PCB order on Sat, 21 Mar 2026 13:24:21 GMT]]></title><description><![CDATA[<p><span><a href="https://infosec.exchange/@CryptoLek">@<span>CryptoLek</span></a></span> when you experiment with new circuits, you often start out with a breadboard, a grid of holes to plug components in that are connected in rows. Once you have a design figured out a bit more you may want to actually solder it down to have a more secure/permanent connection, so various boards with rows of holes in different arrangements exist. I also very much like the SMA edge connectors on top as they allow easy connection of a variety of different cables in the lab.</p>

<div class="row mt-3"><div class="col-12 mt-3"><img class="img-thumbnail" src="https://media.infosec.exchange/infosec.exchange/media_attachments/files/116/267/353/835/752/329/original/0bcb76128cf16f7e.png" alt="Link Preview Image" /></div></div>]]></description><link>https://board.circlewithadot.net/post/https://infosec.exchange/users/phos/statuses/116267382335679660</link><guid isPermaLink="true">https://board.circlewithadot.net/post/https://infosec.exchange/users/phos/statuses/116267382335679660</guid><dc:creator><![CDATA[phos@infosec.exchange]]></dc:creator><pubDate>Sat, 21 Mar 2026 13:24:21 GMT</pubDate></item><item><title><![CDATA[Reply to Quick design to throw into the next PCB order on Sat, 21 Mar 2026 13:18:02 GMT]]></title><description><![CDATA[<p><span><a href="/user/phos%40infosec.exchange">@<span>phos</span></a></span> nice. did you go 4L with ground planes on inner layers? I keep meaning to design some protoboards like that</p>]]></description><link>https://board.circlewithadot.net/post/https://chaos.social/users/gsuberland/statuses/116267357444396399</link><guid isPermaLink="true">https://board.circlewithadot.net/post/https://chaos.social/users/gsuberland/statuses/116267357444396399</guid><dc:creator><![CDATA[gsuberland@chaos.social]]></dc:creator><pubDate>Sat, 21 Mar 2026 13:18:02 GMT</pubDate></item><item><title><![CDATA[Reply to Quick design to throw into the next PCB order on Sat, 21 Mar 2026 13:14:00 GMT]]></title><description><![CDATA[<p><span><a href="/user/phos%40infosec.exchange">@<span>phos</span></a></span> I know next to nothing about "hardware". If have time, can you, please, tell what for would you use it?</p>]]></description><link>https://board.circlewithadot.net/post/https://infosec.exchange/users/CryptoLek/statuses/116267341642910413</link><guid isPermaLink="true">https://board.circlewithadot.net/post/https://infosec.exchange/users/CryptoLek/statuses/116267341642910413</guid><dc:creator><![CDATA[cryptolek@infosec.exchange]]></dc:creator><pubDate>Sat, 21 Mar 2026 13:14:00 GMT</pubDate></item></channel></rss>