<?xml version="1.0" encoding="UTF-8"?><rss xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:atom="http://www.w3.org/2005/Atom" version="2.0"><channel><title><![CDATA[wafer.space bare dies and CoB have arrived!]]></title><description><![CDATA[<p>wafer.space bare dies and CoB have arrived! <img src="https://board.circlewithadot.net/assets/plugins/nodebb-plugin-emoji/emoji/android/1f389.png?v=28325c671da" class="not-responsive emoji emoji-android emoji--tada" style="height:23px;width:auto;vertical-align:middle" title="🎉" alt="🎉" /></p><p>These are from my open-source FABulous FPGA, which was part of the first shuttle run.<br />It's a small FPGA with 480x LC, 6x MAC, 12x register files and 6x SRAM. The source files are available in the repository: <a href="https://github.com/mole99/gf180mcu-fabulous-fpga" rel="nofollow noopener"><span>https://</span><span>github.com/mole99/gf180mcu-fab</span><span>ulous-fpga</span></a></p><p><a href="https://fosstodon.org/tags/OpenSource" rel="tag">#<span>OpenSource</span></a> <a href="https://fosstodon.org/tags/ASIC" rel="tag">#<span>ASIC</span></a> <a href="https://fosstodon.org/tags/FPGA" rel="tag">#<span>FPGA</span></a></p>]]></description><link>https://board.circlewithadot.net/topic/4ce06b92-97c0-4269-b2df-344e3fdd81fd/wafer.space-bare-dies-and-cob-have-arrived</link><generator>RSS for Node</generator><lastBuildDate>Thu, 30 Apr 2026 19:17:05 GMT</lastBuildDate><atom:link href="https://board.circlewithadot.net/topic/4ce06b92-97c0-4269-b2df-344e3fdd81fd.rss" rel="self" type="application/rss+xml"/><pubDate>Tue, 28 Apr 2026 13:19:41 GMT</pubDate><ttl>60</ttl><item><title><![CDATA[Reply to wafer.space bare dies and CoB have arrived! on Wed, 29 Apr 2026 09:45:25 GMT]]></title><description><![CDATA[<p><span><a href="/user/mole99%40fosstodon.org" rel="nofollow noreferrer noopener">@<span>mole99</span></a></span> saw the die pic and brain immediately went "me want bite"<br /><img class="not-responsive emoji" src="https://gts.schizofucked.monster/fileserver/01K1FHH4GT74K14JYR8G1TKTQS/emoji/original/01JYJGY4YKWKG8FETWSZSY3S9V.png" title=":kurumi_girl_monch_chip:" /> me nomming the forbidden stroopwafel</p>]]></description><link>https://board.circlewithadot.net/post/https://gts.schizofucked.monster/users/chaos/statuses/01KQCA22202T6CKVCH9MC2FC6R</link><guid isPermaLink="true">https://board.circlewithadot.net/post/https://gts.schizofucked.monster/users/chaos/statuses/01KQCA22202T6CKVCH9MC2FC6R</guid><dc:creator><![CDATA[chaos@gts.schizofucked.monster]]></dc:creator><pubDate>Wed, 29 Apr 2026 09:45:25 GMT</pubDate></item><item><title><![CDATA[Reply to wafer.space bare dies and CoB have arrived! on Wed, 29 Apr 2026 09:44:18 GMT]]></title><description><![CDATA[<p><span><a href="/user/mole99%40fosstodon.org" rel="nofollow noreferrer noopener">@<span>mole99</span></a></span> smol! ^~^<br />is a cute lil chip</p>]]></description><link>https://board.circlewithadot.net/post/https://gts.schizofucked.monster/users/chaos/statuses/01KQCA00ZMA46JVV6GG52Y3WYP</link><guid isPermaLink="true">https://board.circlewithadot.net/post/https://gts.schizofucked.monster/users/chaos/statuses/01KQCA00ZMA46JVV6GG52Y3WYP</guid><dc:creator><![CDATA[chaos@gts.schizofucked.monster]]></dc:creator><pubDate>Wed, 29 Apr 2026 09:44:18 GMT</pubDate></item><item><title><![CDATA[Reply to wafer.space bare dies and CoB have arrived! on Wed, 29 Apr 2026 09:42:24 GMT]]></title><description><![CDATA[<p><span><a href="/user/mole99%40fosstodon.org">@<span>mole99</span></a></span> Thank you for such a cool contribution to open tech!</p>]]></description><link>https://board.circlewithadot.net/post/https://chaos.social/users/promovicz/statuses/116487339647875277</link><guid isPermaLink="true">https://board.circlewithadot.net/post/https://chaos.social/users/promovicz/statuses/116487339647875277</guid><dc:creator><![CDATA[promovicz@chaos.social]]></dc:creator><pubDate>Wed, 29 Apr 2026 09:42:24 GMT</pubDate></item><item><title><![CDATA[Reply to wafer.space bare dies and CoB have arrived! on Wed, 29 Apr 2026 08:14:01 GMT]]></title><description><![CDATA[<p><span><a href="/user/mole99%40fosstodon.org">@<span>mole99</span></a></span> brilliant! <a href="https://mastodon.social/tags/FPGA" rel="tag">#<span>FPGA</span></a> hardware has been closed for far too long.</p>]]></description><link>https://board.circlewithadot.net/post/https://mastodon.social/users/WillFlux/statuses/116486992141164587</link><guid isPermaLink="true">https://board.circlewithadot.net/post/https://mastodon.social/users/WillFlux/statuses/116486992141164587</guid><dc:creator><![CDATA[willflux@mastodon.social]]></dc:creator><pubDate>Wed, 29 Apr 2026 08:14:01 GMT</pubDate></item><item><title><![CDATA[Reply to wafer.space bare dies and CoB have arrived! on Wed, 29 Apr 2026 06:10:03 GMT]]></title><description><![CDATA[<p><span><a href="https://chaos.social/@tyalie">@<span>tyalie</span></a></span> <span><a href="https://fosstodon.org/@mithro">@<span>mithro</span></a></span> <span><a href="https://chaos.social/@matthewvenn">@<span>matthewvenn</span></a></span> You should also familiarize yourself with simulating your design using simulators such as Icarus Verilog or Verilator via cocotb, for example.<br />The fundamental knowledge you gain from FPGA design can easily be transferred to ASIC design.</p>]]></description><link>https://board.circlewithadot.net/post/https://fosstodon.org/users/mole99/statuses/116486504680474438</link><guid isPermaLink="true">https://board.circlewithadot.net/post/https://fosstodon.org/users/mole99/statuses/116486504680474438</guid><dc:creator><![CDATA[mole99@fosstodon.org]]></dc:creator><pubDate>Wed, 29 Apr 2026 06:10:03 GMT</pubDate></item><item><title><![CDATA[Reply to wafer.space bare dies and CoB have arrived! on Wed, 29 Apr 2026 06:09:40 GMT]]></title><description><![CDATA[<p><span><a href="https://chaos.social/@tyalie">@<span>tyalie</span></a></span> <span><a href="https://fosstodon.org/@mithro">@<span>mithro</span></a></span> <span><a href="https://chaos.social/@matthewvenn">@<span>matthewvenn</span></a></span> Yes, Tiny Tapeout is ideal if you want to start with ASIC design right away.</p><p>As for my personal journey, I started out using the open-source FPGA toolchain (Yosys and nextpnr) with various open-source FPGA boards, such as the excellent iCEBreaker and ULX3S.<br />I'd recommend learning (System)Verilog or another higher-level HDL that compiles down to it, since Verilog is usually well supported by the open-source tools.</p>]]></description><link>https://board.circlewithadot.net/post/https://fosstodon.org/users/mole99/statuses/116486503154201913</link><guid isPermaLink="true">https://board.circlewithadot.net/post/https://fosstodon.org/users/mole99/statuses/116486503154201913</guid><dc:creator><![CDATA[mole99@fosstodon.org]]></dc:creator><pubDate>Wed, 29 Apr 2026 06:09:40 GMT</pubDate></item><item><title><![CDATA[Reply to wafer.space bare dies and CoB have arrived! on Wed, 29 Apr 2026 00:29:06 GMT]]></title><description><![CDATA[<p><span><a href="https://fosstodon.org/@mithro">@<span>mithro</span></a></span> <span><a href="/user/mole99%40fosstodon.org">@<span>mole99</span></a></span> <span><a href="https://chaos.social/@matthewvenn">@<span>matthewvenn</span></a></span> ahh thanks. I'll def. take a look through it ^^</p>]]></description><link>https://board.circlewithadot.net/post/https://chaos.social/users/tyalie/statuses/116485163986375796</link><guid isPermaLink="true">https://board.circlewithadot.net/post/https://chaos.social/users/tyalie/statuses/116485163986375796</guid><dc:creator><![CDATA[tyalie@chaos.social]]></dc:creator><pubDate>Wed, 29 Apr 2026 00:29:06 GMT</pubDate></item><item><title><![CDATA[Reply to wafer.space bare dies and CoB have arrived! on Wed, 29 Apr 2026 00:23:51 GMT]]></title><description><![CDATA[<p><span><a href="https://chaos.social/@tyalie">@<span>tyalie</span></a></span> <span><a href="/user/mole99%40fosstodon.org">@<span>mole99</span></a></span> - I recommend getting started with the excellent TinyTapeout.com</p><p>If you are the type of person who also benefits from more structure then <span><a href="https://chaos.social/@matthewvenn">@<span>matthewvenn</span></a></span> 's Zero to ASIC course is also excellent (see <a href="https://youtube.com/@ZeroToASICCourse" rel="nofollow noopener"><span>https://</span><span>youtube.com/@ZeroToASICCourse</span><span></span></a>).</p>]]></description><link>https://board.circlewithadot.net/post/https://fosstodon.org/users/mithro/statuses/116485143350563349</link><guid isPermaLink="true">https://board.circlewithadot.net/post/https://fosstodon.org/users/mithro/statuses/116485143350563349</guid><dc:creator><![CDATA[mithro@fosstodon.org]]></dc:creator><pubDate>Wed, 29 Apr 2026 00:23:51 GMT</pubDate></item><item><title><![CDATA[Reply to wafer.space bare dies and CoB have arrived! on Tue, 28 Apr 2026 17:10:04 GMT]]></title><description><![CDATA[<p><span><a href="/user/mole99%40fosstodon.org">@<span>mole99</span></a></span> this is really amazing. How do you know (and specially from where) what exactly to do here in what way for the silicon to work its magic?</p><p>I'm also rly. interested to get into silicon circuit designs,, but I'm unsure where to even start.</p>]]></description><link>https://board.circlewithadot.net/post/https://chaos.social/users/tyalie/statuses/116483437644325213</link><guid isPermaLink="true">https://board.circlewithadot.net/post/https://chaos.social/users/tyalie/statuses/116483437644325213</guid><dc:creator><![CDATA[tyalie@chaos.social]]></dc:creator><pubDate>Tue, 28 Apr 2026 17:10:04 GMT</pubDate></item><item><title><![CDATA[Reply to wafer.space bare dies and CoB have arrived! on Tue, 28 Apr 2026 13:20:11 GMT]]></title><description><![CDATA[<p>If you would also like to tape out, registration for the second shuttle run is currently open: <a href="https://buy.wafer.space/" rel="nofollow noopener"><span>https://</span><span>buy.wafer.space/</span><span></span></a></p>]]></description><link>https://board.circlewithadot.net/post/https://fosstodon.org/users/mole99/statuses/116482533706012132</link><guid isPermaLink="true">https://board.circlewithadot.net/post/https://fosstodon.org/users/mole99/statuses/116482533706012132</guid><dc:creator><![CDATA[mole99@fosstodon.org]]></dc:creator><pubDate>Tue, 28 Apr 2026 13:20:11 GMT</pubDate></item><item><title><![CDATA[Reply to wafer.space bare dies and CoB have arrived! on Tue, 28 Apr 2026 13:19:59 GMT]]></title><description><![CDATA[<p>The chip was implemented using the wafer.space LibreLane template (<a href="https://github.com/wafer-space/gf180mcu-project-template" rel="nofollow noopener"><span>https://</span><span>github.com/wafer-space/gf180mc</span><span>u-project-template</span></a>) and uses Yosys and nextpnr for the FPGA toolchain.</p><p>You can find all projects from the first wafer.space run here (ID: G801MOLE): <a href="https://github.com/wafer-space/ws-run1" rel="nofollow noopener"><span>https://</span><span>github.com/wafer-space/ws-run1</span><span></span></a></p>]]></description><link>https://board.circlewithadot.net/post/https://fosstodon.org/users/mole99/statuses/116482532918086381</link><guid isPermaLink="true">https://board.circlewithadot.net/post/https://fosstodon.org/users/mole99/statuses/116482532918086381</guid><dc:creator><![CDATA[mole99@fosstodon.org]]></dc:creator><pubDate>Tue, 28 Apr 2026 13:19:59 GMT</pubDate></item></channel></rss>